发明名称 FRAME SYNCHRONIZATION SYSTEM
摘要 PURPOSE:To perform frame synchronization on a time-division multiplex transmission line effectively by shortening the time up to the establishment of synchronism up to the maximum number of rear protection stages of individual synchronism protecting circuits. CONSTITUTION:The 1st synchronism protecting circuit I synchronizes with a received signal and a frame bit is inserted newly by a frame bit inserting circuit 9 regardless of the synchronism state of the circuit I, thereby synchronizing frames of a signal which is reconstituted by the circuit 9. The 2nd synchronism protecting circuit II initialize the synchronism protection state of the circuit I with a frame bit dissidence signal outputted by the circuit I before the synchronism establishment of the circuit I. In this case, the time up to the synchronism establishment is shortened to the rear protection time of the circuit I.
申请公布号 JPS6194425(A) 申请公布日期 1986.05.13
申请号 JP19840215089 申请日期 1984.10.16
申请人 NEC CORP 发明人 FUKAZAWA YASUO
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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