| 摘要 |
PURPOSE:To constitute the titled circuit of comparatively simple hardware such as a limiter by providing a control signal generating circuit generating a control signal which changes the period of a modulation speed clock of a modulation speed clock generating circuit and synchronizing the phase of a carrier waveform and the phase of a modulation speed clock. CONSTITUTION:Output signals of comparators 8, 9 are inputted to an AND circuit 21 via an OR circuit 18. A pulse of pulse generators 4, 5 is inputted to other input of the said AND circuit 21 via an OR circuit 17, and a pulse is outputted at a change point of the phase of a carrier from the AND circuit 21, that is, at the end of a rectangular waveform having a pulse width corresponding to a threshold value T1 or over or a threshold value T2 or below. A Baud rate clock generating circuit 14 uses a control signal of 'up' and 'down' from AND circuits 22, 23 so a to vary the period of the Baud rate clock, a timer 13 is set by the Baud rate clock outputted from a Baud rate clock generating circuit 14 to count up an oscillating frequency of a fixed oscillator 1. |
