| 摘要 |
<p>PURPOSE:To keep the frequency of a trasmitted serial signal constant even if the frequency of a parallel signal is changed, by converting a clock pulse to a signal having a certain integer-fold frequency of the parallel signal and using this clock pulse to convert the parallel signal to the serial signal and transmitting the serial signal. CONSTITUTION:A frequency converting means 106 consists essentially of a PLL; and when the clock pulse whose frequency is changed to integer-fold frequencies such as 5MHz, 2.5MHz, and 1.25MHz is given to the means 106 as an input signal Pa, the means 106 outputs a high-speed clock pulse. This pulse Pc is given to a load signal generating circuit 107 together with the pulse Pa to obtain a load signal Pd. This signal Pd is given to a parallel-serial converting circuit 109 and is used as the load signal of the parallel signal.</p> |
