| 摘要 |
<p>COMMON MODE SIGNAL DETECTOR A common mode detector for producing an output voltage (VA+VB)/2 in response to input voltages VA and VB contains a pair of MOS transistors connected in series between a pair of input terminals to which the input voltages are to be applied. A separate feedback path runs from each input terminal through a separate load device to a gate control terminal of the respective MOS transistor and a separate other feedback path runs from each input terminal through a separate other load device to a substrate terminal of the respective MOS transistors. In this way, the respective feedback paths deliver to the respective gate terminals respective voltages equal to (VDD+VA)/2 and (VDD+VB)/2, respectively, while the other feedback paths deliver to the substrates of the respective MOS transistors respective substrate bias voltages equal to (VSS+VA)/2 and (VSS+VB)/2, whereby the common mode voltage (VA+VB)/2 is developed at a node between the pair of MOS transistors.</p> |
