| 摘要 |
A class B IC transistor output stage, using a pair of NPN transistors, is described. A quasi-complementary transistor is employed to establish the stage quiescent bias. An NPN bias transistor is coupled to the output sink transistor and is driven from the emitter of the input driver transistor. Therefore, the input signal is coupled to apply the signal directly to the base of the sink transistor as well as to the source transistor. This feedforward arrangement by-passes the PNP transistor when a signal is applied so that the asymmetrical performance of the PNP transistor does not adversely affect the signal performance.
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