发明名称 DIGITAL SIGNAL REGENERATING METHOD
摘要 PURPOSE:To detect an error during an error detecting correction even if a reproducing signal stored previously remains when a next reproducing signal is sored by writing other data in a section in which an error detecting correction code of a memory circuit is stored after an error detection and correction is carried out. CONSTITUTION:From a memory circuit 16, a data is inputted to an error detecting correction circuit 17, and a first error detection is corrected. In case of capable of correcting, the data memorized in the memory circuit 16 is corrected. Then, a first error flag Fc1 is stored in the memory circuit 16. The memory of the first error flag utilizes an area in which a first error detecting correction code Po is stored. Thereby a memory capacity is deteriorated. Namely, since the error detecting correction code is disused after the error detection is corrected, it can be utilized as an area for storing the error flag. Further, in an area 7 in which P1, P2, P3 are stored, 'FF' is stored.
申请公布号 JPS6187278(A) 申请公布日期 1986.05.02
申请号 JP19840208193 申请日期 1984.10.05
申请人 HITACHI LTD 发明人 OKAMOTO HIROO;KOBAYASHI MASAHARU
分类号 G11B20/18;(IPC1-7):G11B20/18 主分类号 G11B20/18
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