| 摘要 |
PURPOSE:To prevent a semiconductor substrate from being directly exposed to R.I.E. and to easily have a dimension control of a channel length of a UVPROM transistor by separating completely a process forming a gate electrode of a peripheral transistor from a process forming a controlling gate electrode of the UVPROM transister. CONSTITUTION:After photoresistors 10 and 10a are formed on the second layer polycrystal line silicon 8 in order that only a UVPROM controlling gate electrode is patterned, the second layer polycrystalline silicon 8, the second gate insulating film 7 and the first layer polycrystalline silicon 6 are etched in order. After photoresists 11 and 11a are formed in order that only a peripheral gate electrode is patterned, the polycrystalline silicon 8 is etched using these as a mask. After that, the photoresist is eliminated and on it an interlayer film is grown, and a semiconductor device including the UVPROM transistor is manufactured with the former method as above. |
