发明名称 WIRE-BONDING
摘要 PURPOSE:To contrive to improve the yield of bonding work by a method wherein the inner lead bonding pads and the outer lead bonding pads, which correspond to the inner lead bonding pads, are respectively connected sequentially holding the mutually opposed inner lead bonding pad and outer lead bonding pad between them, and after that, the remaining inner lead and outer lead bonding pads are connected in order with each other. CONSTITUTION:Plural inner lead bonding pads 1 arrayed on a semiconductor chip 3 in a zigzagged form and plural outer lead bonding pads 2 arrayed on a circuit substrate 5 in a zigzagged form in opposition to the inner lead bonding pads 1 are connected using bonding wires 4 in every other pair of the mutually opposed inner lead bonding pad 1 and outer lead bonding pad 2. Then, the remaining inner lead and outer lead bonding pads 1 and 2, which are respectively located between each inner lead bonding pad 1 being already connected and each outer lead bonding pad 2 being already connected, are connected in order using the bonding wires 4 in the same manner. When such crook as sagging is generated on one of the bonding wires 4, there is no possibility that a short-circuit trouble occurs between the bonding wire 4 and its adjacent bonding wire 4 if the correction is immediately carried out.
申请公布号 JPS6185833(A) 申请公布日期 1986.05.01
申请号 JP19840207784 申请日期 1984.10.03
申请人 TOSHIBA CORP 发明人 FUKUOKA YOSHITAKA;MATSUMOTO EMIKO
分类号 H01L21/60 主分类号 H01L21/60
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