发明名称 SYNCHRONIZING CONTROLLER
摘要 PURPOSE:To detect a transmission timing error of a reference station synchronizing burst with sufficiently high accuracy by providing a timing error detection circuit having a measuring pattern storage circuit and a parallel/serial converting circuit. CONSTITUTION:When a measuring gate is inputted to a timing error detection circuit 13, a leading detection circuit 17 detects the leading to start count (18). Its output signal is selected by a selection circuit 19, is fed to a measuring pattern storage circuit 16 and stored in a designated address sequentially in the unit of 8-bit. When a full measuring code is stored in the circuit 16, the leading of the measuring gate is detected (20), and the content of the circuit 18 is cleared. Then the count of a counter circuit 22 for write timing of a parallel/serial converting circuit 24 and a counter circuit 21 for read address of the circuit 16 is started at the same time and the circuit 19 controls the circuit 21 so that an output of the circuit 21 is selected. Thus, the transmission timing error of the reference station synchronous burst is detected with sufficiently high accuracy.
申请公布号 JPS6184929(A) 申请公布日期 1986.04.30
申请号 JP19840207804 申请日期 1984.10.03
申请人 NEC CORP;NIPPON TELEGR & TELEPH CORP <NTT> 发明人 ANDO MITSUGI;NISHI YASUKI
分类号 H04J3/06;H04B7/15;H04B7/212;H04Q11/04 主分类号 H04J3/06
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