发明名称 DIGITAL LOGIC CIRCUIT
摘要 PURPOSE:To simplify circuit constitution, and to design easily an optimum circuit by constituting a titled circuit of a circuit for converting (m) pieces of binary inputs to an element on a limited Galois body GF (2<m>), a circuit for obtaining a desired logical output by inputting the element converted by said circuit, and a circuit for converting the element on the limited Galois body GF (2<m>) being an output of this circuit, to the binary input. CONSTITUTION:A logical circuit using a limited Galois body is constituted of three circuits A, B and C. The circuit A is a circuit for converting binary inputs (x1, x2,...,xm) to an element alpha<i> on the corresponding GF (2<m>). The circuit B is circuit for providing a logical output alpha<i> on GF (2<m>) by inputting the element alpha<i>. The circuit C is a circuit for converting the output alpha<i> on GF (2<m>) binary outputs (y1, y2,...,ym) again. In this way, with respect to request specifications of plural logical circuits, the circuit A for converting the binary input to the element of GF (2<m>), and the circuit C for converting the element of GF (2<m>) to the binary output can use the same one in common. That is to say, with respect to the request specifications of the logical circuit, only a change in circuit B is sufficient.
申请公布号 JPS6182534(A) 申请公布日期 1986.04.26
申请号 JP19840204409 申请日期 1984.09.29
申请人 TOSHIBA CORP 发明人 HIWATARI TAMOTSU
分类号 H03M13/00;G06F11/10;H03K19/20 主分类号 H03M13/00
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