发明名称 GATE AND CONTACT OF MOS INTEGRATED CIRCUIT, MUTUAL CONNECTION STRUCTURE AND MAKING THEREOF
摘要 A simplified process for metal gate and contact/interconnect system for MOS VLSI devices employs a refractory metal structure for the gate, including a thick layer of tungsten alone, with stress and adhesion controlled by the deposition conditions. The metal gate receives sidewall oxide spacers during a metal-cladding operation for the source/drain areas. Contacts to the source/drain region include a molybdenum/tungsten stack and a top layer of gold.
申请公布号 JPS6181668(A) 申请公布日期 1986.04.25
申请号 JP19850137653 申请日期 1985.06.24
申请人 TEXAS INSTR INC 发明人 JIEEMUSU EMU MATSUKUDEEBITSUDO
分类号 H01L21/8234;H01L23/532;H01L27/088;H01L29/417;H01L29/45;H01L29/49;H01L29/78 主分类号 H01L21/8234
代理机构 代理人
主权项
地址
您可能感兴趣的专利