| 摘要 |
PURPOSE:To obtain a semiconductor memory element possible for high speed operation by adopting the circuit constitution that a consecutive prescribed bit location parallel output is received from a shift register inputting a signal and a prescribed bit output is outputted to a latch circuit with a shift amount switching signal in a multiplexer. CONSTITUTION:A semiconductor memory element is provided, where a shift register 11 to which a data signal D such as a television signal and a clock CK are inputted and having output lines 14, 15 leading out a consecutive bit location parallel output near the 455-bit location and 910-bit location, multipliexers 16, 17 controlled by the shift amount switching signal S and transmitting the bit output of the output lines 14, 15 to the latch circuits 18, 19, and latch circuits 18, 19 operated by the clock CK and outputting an output Q1 around the shift quantity 455 bits and an output Q2 around shift quantity 910 bits at the same time are provided. Thus, it is possible to obtain plural different outputs with different shift amount at the same time and to attain high-speed operation. |
