发明名称 A complementary semiconductor device having high switching speed and latchup-free capability.
摘要 <p>A complementary type semiconductor device comprises n-channel FETs (n-Tr) and different types (p-Tr,, p-Trz) of p-channel FETs formed in an n--type semiconductor substrate (1). p-channel FETs of a first type (p-Tr,) and n-channel FETs (n-Tr), both having deep well regions (9a, 2) are employed for input/output circuits arranged in a peripheral area of the substrate (1) so that these transistors are directly connected to exterior circuit through bonding wires and the like. The transistors (p-Tr,) are seldom disturbed by undesirable noises from the external circuits, because these FETs are suitable for preventing the latchup effect of the circuits. While the other p-channel FETs (p-Tr2) having n-type sub-well regions (9b) beneath their gate insulator layers (5) selectively, and thus resulting in relatively small junction capacitances, are employed in circuits needed for high switching speed and arranged in the inner area of the substrate. By the selective adoption of the p-channel FETs of different types corresponding to the requirements of the associated circuits, a complementary semiconductor device having highly reliable operation and high switching speed is achieved.</p>
申请公布号 EP0178991(A2) 申请公布日期 1986.04.23
申请号 EP19850401971 申请日期 1985.10.10
申请人 FUJITSU LIMITED 发明人 SHIRATO, TAKEHIDE
分类号 H01L27/08;H01L21/8238;H01L27/092;H01L29/78;(IPC1-7):H01L27/08;H01L29/06;H01L21/82 主分类号 H01L27/08
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