发明名称 HIGH-TENSION INSULATED GATE TYPE FIELD-EFFECT TRANSISTOR
摘要 PURPOSE:To obtain a high-tension NMOSFET having a short channel by forming a low impurity-concentration source layer having the same conduction type as an offset gate region between a source layer and the channel while being brought into contact with the source layer, shaping a gate through an insulating film extending over the low impurity-concentration source layer and the channel and thinning a film on the low-concentration source. CONSTITUTION:A P<+> ground leading-out layer 8 and an N<+> drain layer 5 are formed to a P type Si substrate 1 through a conventional process, and B and As are implanted to shape a P buried ground 9 and an N<+> source layer 10. SiO2 16 and Si3N4 18 are laminated, a resist mask 19 is formed, and N type offset region 6 and low-concentration source layer 7 are formed through ion implantation. Si3N4 18 is left only to a layer 7 section and a gate oxide film 17 is shaped, and the film 18 is removed and a poly Si gate 4 is formed extending over the layer 7 and a channel 20, thus making the oxide film 16 on the layer 7 thinner than the film 17. A high-tension NMOSFET is completed according to a predetermined method. Channel length LE can be formed according to a desired value by the length of the layers 6 and 7. When the length of the layer 7 is brought to 3mum or more and the thickness of the film 16 is selected in approximately 500Angstrom , the high-tension NMOSFET having a short channel is shaped with high reliability.
申请公布号 JPS6179260(A) 申请公布日期 1986.04.22
申请号 JP19840200928 申请日期 1984.09.26
申请人 NEC CORP 发明人 SAITO MIKIKO
分类号 H01L29/78 主分类号 H01L29/78
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