| 摘要 |
<p>ADAPTIVE DIFFERENTIAL PSK DEMODULATOR . An adaptive differential phase shift keyed (PSK) signal demodulator which optimally tracks changes in the symbol rate of the signal. An input signal is delayed by one symbol period by passing the signal through a charge coupled device (CCD) clocked by pulses phase locked to the symbol rate (Fbr) by a phase locked loop, the phase locked loop also outputting clock pulses at the symbol rate to strobe a symbol decision circuit. The CCD has L stages and is clocked at a rate L.Fbr. As the phase locked loop tracks changes in the symbol rate, the clock pulses are varied in rate so that the CCD delay is adaptively optimized for a given symbol rate. Digital tuning is provided by an adjustable divider circuit coupling the voltage controlled oscillator of the phase locked loop to the CCD, so that by digitally selecting the division ratio the demodulator is tuned to a different symbol rate.</p> |
