| 摘要 |
PURPOSE:To simplify the constitution by referencing a 16 QAM signal only at the period of 00H of a detected synchronous data and locking a PLL to extract a carrier signal. CONSTITUTION:A counter 84 is cleared at S3=0, a count value of the counter 84 is not much increased as shown in waveform E and the level of the carrier output CY remains '0'. The state of S3=1, however, continues over 20-sample period during a period Th and the counter 84 is not cleared, then the count of the counter 84 increases gradually and the carrier output CY goes to '1' at a point of time during the period Th. Then the carrier output CY is fed to a waveform shaping circuit 85, where a pulse Ph having a prescribed pulse width is obtained during the next period Th as shown in waveform F, the pulse Ph is fed to a gate circuit 72 as its control output and a DC signal in the signal Sm during the period Th is fed to a filter 73. Thus, a signal S0 is phase-locked to the signal Sm in the PLL 70 during the period Th. |
