| 摘要 |
PURPOSE:To simplify the hardware of titled circuit by applying 16 QAM and gray-coding to a digital data so that the level and phase of a carrier signal reach a prescribed reference value during the period of a synchronous data. CONSTITUTION:A digital data Sd added with a synchronous data of a prescribed value 00H is used to apply 16 QAM so that the level and phase of a carrier signal reach a reference value at the period Th of the synchronous data at each prescribed period Th. Further, signals B0,B1 are fed to a converting circuit 19A to form gray code signals Ba,Bb where the level of the signal B1 is inverted when the level of the B0 is logical 1, the signals B2,B3 are fed to a converting circuit 19C, where similar gray codes Bc,Bb are obtained. Since the inter-code distance of adjacent code words is all 1 in the I and Q axes of the signal Sm and is all 2 on a line of 45 deg., even when a code error takes place at the demodulation of the signal Sa at the reception side, the effect is minimized and the hardware is simplified for error compensation. |
