发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To avoid the deterioration of general purpose properties due to the decrease of the number of input terminals by applying the output of a memory cell for initial data to an output register with no intervention of a multiplexer of a PROM and setting the logical output of said cell at a level different from the output level of the PROM. CONSTITUTION:The data given from a memory 14 are supplied to outside through output terminals Q0-Q7 via a multiplexer 15 selected in response to an address, a switch 16, a master FF17, a switch 18, a slave FF19, an output buffer 20 and a switch 21 respectively when the signal INIT is set at a high level. While the switch 16 is changed over when the signal INIT is set at a low level. Then the initial data of a memory cell 23 are transferred to the FF17 or FF19 and delivered via the buffer 20. Both cells 14 and 23 can write data. In this case, the writing operations are given to the cell 14 or 23 through the terminals Q0-Q7 via a program circuit 13 after the switch 21 is cut off. The selection of the cell 14 or 23 is decided by the signal INIT.</p>
申请公布号 JPS6177914(A) 申请公布日期 1986.04.21
申请号 JP19840198607 申请日期 1984.09.25
申请人 FUJITSU LTD 发明人 MIYAMURA TAMIO;OKAWA TAKASHI
分类号 G11C17/00;G06F1/24;G11C7/10;G11C7/20;G11C11/40;G11C17/14 主分类号 G11C17/00
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