发明名称 WINDOW ARITHMETIC CIRCUIT
摘要 PURPOSE:To perform the window operation of an optional size by connecting selectively each output of buffer modules connected in a pipeline form to each input of arithmetic modules connected in a pipeline form via a switch circuit. CONSTITUTION:The outputs of an input data terminal 2 and buffer modules 11, 12...1n-1 which are connected to the terminal 2 in a pipeline form are connected to a switch circuit 4. Then each switch output is connected selectively to (mXn) units of arithmetic modules 31, 32, 3...3mxn which are connected in a pipeline form. When (3X3) units of window arithmetic circuits are formed, the terminal 2 is connected to arithmetic modules 37, 38 and 39 respectively via the circuit 4. Then the output of the module 11 is connected to arithmetic modules 34, 35 and 36 via the circuit 4. Then the output of the module 12 is connected to arithmetic modules 31, 32 and 33 respectively via the circuit 4.
申请公布号 JPS6175956(A) 申请公布日期 1986.04.18
申请号 JP19840198347 申请日期 1984.09.21
申请人 FUJITSU LTD 发明人 MASUI TAKESHI;SASAKI SHIGERU;GOTO TOSHIYUKI
分类号 G06F17/10;G06T5/20 主分类号 G06F17/10
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