发明名称 Integrated circuit mechanism for coupling multiple programmable logic arrays to a common bus
摘要 An integrated circuit mechanism is provided for coupling the separate sets of output lines from a plurality of programmable logic arrays to the same set of bus lines of plural-line signal transfer bus. This coupling mechanism includes precharge circuitry for precharging each of the bus lines during a first time interval. This coupling mechanism also includes a separate strobe signal line for each programmable logic array and circuitry for activating one of the strobe signal lines during a second time interval for selecting a particular programmable logic array. This coupling mechanism further includes a separate output buffer for each programmable logic array. Each such output buffer includes a plurality of buffer stages for individually coupling the different ones of the programmable logic array output lines to their respective bus lines. The buffer stages for each programmable logic array are responsive to the strobe signal for its programmable logic array for discharging during the second time interval those bus lines for which its programmable logic array output lines are at a particular binary value.
申请公布号 US4583193(A) 申请公布日期 1986.04.15
申请号 US19820350681 申请日期 1982.02.22
申请人 INTERNATIONAL BUSINESS MACHINES CORP. 发明人 KRAFT, WAYNE R.;CASES, MOISES;STAHL, JR., WILLIAM L.;THOMA, NANDOR G.;WYATT, VIRGIL D.
分类号 H01L21/822;G06F9/22;G06F9/26;G06F9/28;H01L21/82;H01L27/04;H03K19/173;H03K19/177;(IPC1-7):G06F13/38 主分类号 H01L21/822
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