发明名称 |
Process for forming multi-layer interconnections |
摘要 |
First conductive members are buried in first holes formed in a first insulating film to connect the second interconnection layers, formed through first and second insulating films, to a semiconductor substrate. Second conductive members are buried in second holes formed to be positioned on the first holes of the second insulating film. Thus, the reliability of a semiconductor device of a multi-layer interconnection structure is improved, and the integration thereof is improved.
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申请公布号 |
US4582563(A) |
申请公布日期 |
1986.04.15 |
申请号 |
US19840675859 |
申请日期 |
1984.11.28 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
HAZUKI, YOSHIKAZU;MORIYA, TAKAHIKO |
分类号 |
H01L21/3205;H01L21/768;H01L23/52;(IPC1-7):B44C1/22;C23F1/02;H01L23/48;H01L29/46 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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