| 摘要 |
PURPOSE:To improve the reliability of a T1-S-T2 switch by detecting a circuit trouble with the aid of an idle time slot and simultaneously carrying out the parity checking by each memory circuit so as to detect the trouble. CONSTITUTION:A performance pattern signal PMD generated from a performance monitor pattern generating circuit PMS1 is stored in a memory 3. Then the signal read out of the memory 3 is parity-checked by a parity detection circuit 4, and the time slot which is not matched to the logic is decided to be a trouble. The performance pattern signal outputted from the memory 3 in such a way is distributed to each circuit through a switch part SW in order to carry out the switch function checking, transmitted to memory parts T2(1)-T2(n), and parity-checked. |
