| 摘要 |
A DC to AC bridge inverter circuit produces a sine wave output of low-harmonic content. One transistor of each pair of transistors in opposite arms of the inverter bridge is switched into conduction at the desired output frequency; i.e., 400 times per sec. for a 400 Hz. output. The remaining complementary transistor of each pair is switched on and off n times per alternation to produce n constant amplitude, variable width output pulses during each alternation. The duration of the conduction time of the complementary transistor is controlled so that the area of each pulse is equal to the area of the corresponding sinusoidal segment where each sinusoidal segment represents an angle phi , in electrical degrees equal to: phi = 180 DEG / n. These variable width output pulses are applied to a filter to produce a sinusoidal output having low-harmonic content. A clock-driven logic system controls the complementary transistor of each transistor pair turning it on n times per alternation and turning it off at different times during each interval to produce the desired sinusoidal pulse width modulation. The turnoff pulses are generated by a clock-driven divider and associated AND gates. Each of the AND gates is energized in response to a predetermined count from the divider to produce a turnoff pulse during each of the n intervals at a point in time during each interval such that the pulse width is proportional to the sine of the angle.
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