发明名称 WAFER OR CHIP HAVING ALIGNMENT MARK FOR ELECTRICAL MEASUREMENT
摘要 PURPOSE:To enable effectively preventing an erroneous judgment and collecting accurate data by forming an alignment mark so that the contact conditions of the edge of a probe can be judged at the time of an electrical measurement. CONSTITUTION:The region encircled by a dotted line is a semiconductor chip 1 wherein plural alignment marks 2 for electrical measurement are formed, the alignment mark consists of a metal piece 4 smaller than a bonding pad 3 and an insulation (SiO2) layer 5 and these are mutually connected electrically with a metal wiring 6. This enables to perfectly confirm the contact conditions of a wafer with a probe at the time of electrical measurement by an auto-prober and consequently, an erroneous measurement due to the poor contact of the probe with a pad can be previously be prevented. If a probe board is specifically used, the bending of the wear of the edge or the slipping of the probe can also be detected.
申请公布号 JPS6170735(A) 申请公布日期 1986.04.11
申请号 JP19840192366 申请日期 1984.09.13
申请人 SUMITOMO ELECTRIC IND LTD 发明人 SUMINO YUTAKA
分类号 G01R31/26;G01R1/073;H01L21/66 主分类号 G01R31/26
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