| 摘要 |
<p>An automated integrated circuit tester is constructed as a state machine. Complete test routines are contained in a state memory (10). A state generator (21) is controlled by state memory (10) and produces addresses therefor. A complete test condition can be set up using the information in a single address in state memory (10). Provisions are made for test routine loading from a local computer (11), which also serves to log data without interfering in test execution. A preferred embodiment provides both DC parametric and AC testing in a tester which can accommodate up to 256 pins. A single force and measure unit (28) is devoted to each pin.</p> |
