发明名称 TIMER CIRCUIT
摘要 <p>PURPOSE:To maintain a stalling mode time constant by once discharging the charge of a charging circuit at stalling mode state time during the operation of a timer circuit. CONSTITUTION:A timer circuit 9 used for a pulse width controller has a charging circuit 91, a discharging circuit 92 for discharging in response to a signal 13 from a pulse signal generator 4 and a signal 15 from a reference voltage controller 12, a signal generator 93 for transmitting a reduction signal 14 to a drive circuit 5, a signal generator 94 for outputting an operation stop signal 16 of the controller 12, and a discharging circuit 95 for outputting a signal 96 to the generator 94. Thus, the controller 12 operates, the circuit 95 discharges the charge to lower a charging level at stalling mode state time (when a signal 19 is high level) and transmits a signal 96 for outputting the operation stop signal 16 of the controller 12 to the generator 94. Thus, the stalling mode time becomes constant without influence to the controller 12.</p>
申请公布号 JPS6169378(A) 申请公布日期 1986.04.09
申请号 JP19840190909 申请日期 1984.09.12
申请人 NEC CORP 发明人 NISHITOBA SHIGEO;HIROTA YOSHIHIRO
分类号 F02P3/045;F02P3/04;H02M9/00;H03K5/04;H03K5/13 主分类号 F02P3/045
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