| 摘要 |
<p>The present invention provides an output logic means for controlling configuration of an output for an integrated circuit which provides a logic signal including a register means responsive to a clock signal for latching the logic signal to provide a registered signal. An output select means receives both the logic signal and the registered signal and selects responsive to an output select signal, either the logic signal or the registered signal. A feedback means provides a feedback signal as data which is selected by a feedback select means responsive to a feedback select signal for selecting the logic signal or the registered signal as the feedback signal. Further, a clock signal enable means, responsive to a clock enable signal, enables or disables the clock signal to clock the register means. Accordingly, the register means, the output select means, the feedback means, and the clock enable means are all dynamically controllable by respective control signals.</p> |
