| 摘要 |
PURPOSE:To obtain an equalizer resetting system whose circuit configuration can be simplified, by providing a polarity setting circuit between an input signal selecting circuit forming an integration circuit with reset and an integration circuit. CONSTITUTION:When a carrier reproducing synchronous loop 105 from a carrier reproducing circuit 3 to an automatic equalizer 1 is under a synchronized condition, a tap controlling signal 60 inputted in the input selecting circuit 9 of an integration circuit with reset in the equalizer is inputted in the EX-OR gate 12 of a polarity setting circuit 14 through an OR gate 7. Since a reset controlling signal 59 is '1' when a switch 13 is connected with a contact A side, the output of the gate 12 is inverted into '0' and '1' in accordance with the '1' and '0' of the signal 60 and inputted in an operational amplifier 8 forming an integrator. When the switch 13 is connected with another contact B side, the '1' and '0' of the signal 60 are outputted as they are to the output of the gate 12. When the loop 105 is not synchronous, the signal 59 is '0' and the output feedback signal of the amplifier 8 is inputted in the gate 12 and the output of the gate 12 is always '0' regardless of the connected side of the contact of the switch 13 and forms a negative feedback loop in the amplifier 8. Thus the output of the gate 12 stabilizes. |
