| 摘要 |
PURPOSE:To reduce the necessary area and electrostatic capacity as compared with a semiconductor device having a conventional stabilized resistance by forming a polysilicon between an electrode and an emitter region or a base region, forming high and low density impurity layers in the upper and lower portions, and forming the two layers in a stabilized resistance. CONSTITUTION:A P type base region 4 and an N type emitter region 3 are formed on an N type semiconductor substrate 7, a polysilicon layer which contains 10<18>-5X10<19>atoms/cm<3> of phosphorus is formed in 3,000Angstrom of thickness on the contact of the region 3, an arsenic is implanted to the surface under the conditions of 50keV, 3X10<14>-2X10<16>atoms/cm<3> to activate the arsenic implanted to 750 deg.C. Then, emitter electrodes 1, 2 are formed on a polysilicon layer 8, and the ohmic resistance (10<-3>-10<6>OMEGA/cm<3>) of the surface high density layer and the high resistance (10-0.05OMEGAcm) of the intermediate layer are used as series resistance for a current flowed to the region 3. Thus, a diffused region for a ballast resistance can be eliminated on the substrate 7 to reduce the chip size. Since the bonding capacity between the substrate 7 and the ballast resistor can be eliminated, it can prevent the high frequency characteristic from deterio rating. |
