| 摘要 |
PURPOSE:To reduce software errors by forming capacitor not only in recesses formed by etching a substrate but in grooves formed on a recess side wall, thereby largely increasing the area of the capacitor. CONSTITUTION:An Si surface is exposed at the part of the side wall of an element separating grooves 14 as shown in Fig. (f) by etching under the condition that a CVD-SiO2 is etched faster by utilizing the difference of the etching speeds of a thermally oxidized film 20 and a CVD-SiO2 film 16. Then, only Si is selectively etched as shown in Fig. (f) by isotropical ion etching or isotropical wet etching to form the etching grooves 21 of Si laterally. Then, vapor phase diffusion is again performed with POCl3, an N<+> type layer 19 is formed on the surface of the groove 21, and again thermally oxidized as shown in Fig. (h) to form an SiO2. |
