发明名称 PULL-IN CIRCUIT
摘要 PURPOSE:To eliminate disturbance due to echo and reception signal by performing a pull-in of a timing regeneration circuit from a reception signal during a period when no echo is generated and performing a pull-in of an echo canceller during a period when no reception signal exists from a transmission signal. CONSTITUTION:A transmission signal 0 consecutive detection circuit 3 detects the consecutive 0 period of the transmission signal, a timing reproduction circuit performs pull-in at the period, that is, when no echo is generated to form a timing regenerating clock. Moreover, the echo canceller 5 detects an echo component at the consecutive 0 period, that is, when no reception signal exists to cancel the echo.
申请公布号 JPS6166422(A) 申请公布日期 1986.04.05
申请号 JP19840189222 申请日期 1984.09.10
申请人 FUJITSU LTD 发明人 FUKUDA SETSU;TSUDA TOSHITAKA;MURANO KAZUO
分类号 H04B3/23;(IPC1-7):H04B3/23 主分类号 H04B3/23
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