发明名称 AUTOMATIC EQUALIZER
摘要 PURPOSE:To reduce number of delay lines and to decrease the circuit scale by constituting a transversal filter constituting an automatic equalizer with a cyclic filter. CONSTITUTION:Two delay lines 11-1, 11-2 are used and the input and output of them are fed to an adder 13 via weighting devices 12-0-12-2. Further, the input and output of the delay line 11-2 are fed to an adder 23 via weighting devices 22-2, 22-2, an output of an adder 23 is fed back to the adder 21 and fed back negatively to the input signal. Then a signal in which transmission waveform distortion of the input signal on a time axis from the adder 13 is compensated is outputted.
申请公布号 JPS6166418(A) 申请公布日期 1986.04.05
申请号 JP19840188189 申请日期 1984.09.10
申请人 FUJITSU LTD 发明人 KOBAYASHI KENZO
分类号 H03H15/00;H03H17/00;H03H21/00;H04B3/06;H04L25/03 主分类号 H03H15/00
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