| 摘要 |
PURPOSE:To reduce a thermal resistance and a source inductance by using an Si substrate which is connected to the source electrode of an FET as a source electrode and a heat sink. CONSTITUTION:GaAs is grown on an Si substrate 1 and a buffer layer is formed. After the buffer layer is annealed, a GaAs layer is further grown on the buffer layer and a semi-insulatine GaAs layer 2 is formed. Then, a shallow channel region 3 is formed in the GaAs layer 2 by implanting an Si ions in the GaAs layer 2 and by annealing. Then, a gate electrode 4 is formed on the channel region 3, a source electrode 6 which is connected to the Si substrate 1 through a contact hole 5 and is kept in ohmic contact is formed on one side from a boundary of the gate electrode 4 and on the other side, a grain electrode 7 which is kept in ohmic contact is formed on the channel region 3. Then, a wiring electrode 8 is formed on the source electrode 6 and the drain electrode 7. |
