| 摘要 |
A phase changing circuit in a logic circuit includes an ECL circuit which has a plurality of emitter output circuits. One emitter output circuit is used as the normal output. The other emitter output circuits are connected to additional capacitors. The emitter output circuits connected to the additional capacitors are also connected to an emitter output portion of separately provided control ECL circuits. An input control level of the control ECL circuit is changed to change the output level of the control ECL circuit. In accordance with whether the output level of the control ECL circuit is low or high, the additional capacitor affects or does not affect the normal output of the ECL circuit. When the capacitor affects to the normal output of the ECL circuit, the signal propagation from the input to the normal output is delayed. |
