发明名称 |
COMMUNICATION CONTROL SYSTEM |
摘要 |
PURPOSE:To improve the processing capability of a communication controller by allowing a line control section to inform autonomously disable/enable reception of the own station when the generation and release of a deficient state of a buffer memory or busy state of the line control section is detected on the way of data reception and storage. CONSTITUTION:The communication controller 1 is provided with line control sections 4-1-4-n transmitting/receiving data with an opposite station connected via a communication line, a main storage device 3 having a buffer memory storing the data and a CPU2. If a buffer memory in the device 3 is deficient or the busy state of the section 4-1 takes place during the reception, a microprocessor MPU42 reports it to the CPU2 by the flow control and the reception disable state of the itself is informed instantly to the opposite station according to the communication control procedure with no intervention of the CPU2. When the reception disable state of the own station is released converse ly, the own reception enable state is informed instantly to the opposite station not via the CPU2. |
申请公布号 |
JPS6163141(A) |
申请公布日期 |
1986.04.01 |
申请号 |
JP19840185189 |
申请日期 |
1984.09.04 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
ICHIKAWA HIROYUKI;AOKI MAKOTO;HAYAKAWA EI;SUGANO SHIN |
分类号 |
H04L29/08;H04L13/00;(IPC1-7):H04L13/00 |
主分类号 |
H04L29/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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