发明名称 THIN FILM MULTILAYER INTERCONNECTION SUBSTRATE
摘要 PURPOSE:To enable to improve the connecting lifetime of the bump connecting part and to perform a Cu wiring by a method wherein the bonding pad and the wiring layer are both formed of a multilayer metal layer, which is constituted of the intermediate burrier layer consisting of Ni, the upper layer consisting of Au and the lower layer consisting of Ti. CONSTITUTION:A wire bonding pad 2 and a wiring layer 3 to be used for connecting the bump electrode of a semiconductor element 4 coexist on the uppermost layer of a multilayer interconnection substrate 1. This wiring layer 3 is constituted of a multilayer metal layer, which is formed of an intermediate burrier layer 6 consisting of Ni, an upper layer 7 consisting of Au and a lower layer consisting of Ti, and the pad 2 is also constituted of a multilayer metal layer in the same constitution (each of the constituent layers also consists of Ni, Au or Ti) as that of the wiring layer 3. The wiring layer 3 and the pad 2 are simultaneously formed by evaporating the metals consisting the multilayer metal layers.
申请公布号 JPS6143461(A) 申请公布日期 1986.03.03
申请号 JP19840164965 申请日期 1984.08.08
申请人 HITACHI LTD 发明人 EMOTO YOSHIAKI;KOBAYASHI TSUNEO;OKUYA KEN
分类号 H01L21/60;H01L23/538;H05K1/09 主分类号 H01L21/60
代理机构 代理人
主权项
地址