发明名称 MANUFACTURE OF MOS TRANSISTOR
摘要 PURPOSE:To prevent the collapse of an LDD structure by forming an N<-> layer of a source region by phosphorus diffusion from a side-wall PSG and forming an N<+> layer of a source and drain region by the subsequent ion implantation. CONSTITUTION:On a P type silicon wafer 11, an SiO2 film 12 for gate, a refractory metal thin film 13, and an Si3N4 film 14 are formed in order and nextly a gate region is patterned by etching. Subsequently a side-wall PSG film 15 of the gate region is formed. Next, an SiO2 film 16 is formed by thermal oxidation in the region which is not covered with the film 15, which is used as the film preventing damages during N<+> ion implantation process. In this case, a thin N<-> layer 17 is formed on a surface of the wafer 11. Next, after N<+> impurities are implanted, the desired N<-> layer 18 is formed on the wafer 11 right under the film 15 and an N<+> layer 19 is formed in the N<+> ion implantation region. Then the film 14 is removed to obtain a MOSFET.
申请公布号 JPS6143477(A) 申请公布日期 1986.03.03
申请号 JP19840164913 申请日期 1984.08.08
申请人 HITACHI LTD 发明人 AZUMA TAKASHI
分类号 H01L29/78 主分类号 H01L29/78
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