发明名称 CONTROL DEVICE OF CHANNEL FOR DIGITAL EXCHANGE
摘要 PURPOSE:To prevent occurrence of an alarm at a facing station by processing with a microprocessor when a phase is restarted and then, processing so that a sending signal memory (SSM) may be cleared. CONSTITUTION:When a phase is restarted, a phase restarting processing signal from a central control device (CC) is decoded at a signal checker-cum-distributor 13, the phase restarting processing signal is transferred to a microprocessor (muP) and the, CPU21 recognizes this and a control is executed by a program for restarting a phase of ROM22. Thus, a FF group (MSD) resetting is executed. Next, P sends the data for resetting a network (NW) trouble flag, to a driver 14 in a received signal distributing device (SRD). An inner sequence control part 12 sends and controls the data and therefore, a NG trouble flag is reset. In this way, when the phase is restarted, being different from a control at the time of turning on power source of NW, an initial setting of a secondary side time switch (STC) and SSM is not executed.
申请公布号 JPS6162294(A) 申请公布日期 1986.03.31
申请号 JP19840185045 申请日期 1984.09.04
申请人 FUJITSU LTD 发明人 TAKAHASHI ATSUHISA;TAKECHI HIROAKI
分类号 H04Q3/545;H04Q11/04 主分类号 H04Q3/545
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