发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To inspect the output state at a plurality of terminals with a single terminal, by outputting multiple output terminal states at a specified terminal. CONSTITUTION:A counter LSI 1 as 16-digit decimal counter has segment output terminals Oi1-Oi4, four per digit, hence, 64 in total. The first logical circuit 6 divides the frequency of a testing pulse S1 inputted from a testing input terminal 5. The second logical circuit 7 counts clocks inputted from a clock terminal 3 to be outputted to the third logical circuits 8. The circuits 8 generates a testing output pulse according to a logical value inputted from the circuits 6 and 7.
申请公布号 JPS6162879(A) 申请公布日期 1986.03.31
申请号 JP19840185736 申请日期 1984.09.04
申请人 SHARP CORP 发明人 NAGAHIRO MASAYUKI;MORI MASAMI
分类号 G01R31/28;G06F11/267;H01L21/66;H01L21/822;H01L27/04 主分类号 G01R31/28
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