发明名称 |
CIRCUIT DEVICE FOR SYNCHRONIZING TIMING PULSE SIGNAL RECEIVED IN TRANSMITTING DIGITAL INFORMATION IN TRANSMITTOR WITH TIMING PULSE SIGNAL GENERATED AT RECEIVER SIDE |
摘要 |
The inventive circuit arrangement effects that a too wide adjustable deceleration of a clock generator is prevented, if gaps occur in a received signal, and that possible adjustment faults are compensated immediately when the receiving signal appears again. Thus the phase relation of the clock generator is adjusted to the phase of the received signal very soon. |
申请公布号 |
JPS6161537(A) |
申请公布日期 |
1986.03.29 |
申请号 |
JP19850181953 |
申请日期 |
1985.08.21 |
申请人 |
TEREFUOONBAU & NORUMAARUTSUAITO GMBH |
发明人 |
BERUKAN ARUTOUN;HERUMUUTO GOI |
分类号 |
H04L7/033 |
主分类号 |
H04L7/033 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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