发明名称 DIGITAL FILTER
摘要 PURPOSE:To have the number of times of read of a RAM to the number of taps per one sample output by using two RAMs and reading data of taps at symmetrical positions at the same time. CONSTITUTION:An address generating circuit 2 generates an address of a ROM4 and RAMs 15, 16. A shift register is divided into two RAMs, the left side is taken as RAMs 1, 15 and the right side is as RAMs 2, 16, an x(n-1) is read from the RAMs 1, 15, an x(n-2) is read from the RAMs 2,16 at the same time, and after the x(n-1), x(n-4) are added, a coefficient a1' is multiplied and the result is stored by an accumulating adder 6. Then an x(n-2) is read from the RAMs 2, 16, after the x(n-2), x(n-3) are added, a coefficient a2 is multiplied, the value is added to the accumulated sum so far the preceding time by using an accumulating adder to form an output sample. The oldest data in the RAM1 passes through a line 18 in figure, written in the RAMs 2, 16, a data newer than the input 1 in figure is written in the RAMs 1, 15 and the similar operation calculating the preceding output sample is executed.
申请公布号 JPS6160005(A) 申请公布日期 1986.03.27
申请号 JP19840181715 申请日期 1984.08.31
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OSADA ATSUSHI;KUBO JUNICHI
分类号 H03H15/00;H03H17/06 主分类号 H03H15/00
代理机构 代理人
主权项
地址