发明名称
摘要 PURPOSE:To obtain a plain separate construction of polycrystalline Si, by a method wherein a substrate provided with V-shaped grooves is subjected to such processes as deposition of a polycrystalline Si layer, selective introduction of B into the polycrystalline Si in the groove part, and selective etching of polycrystalline Si unadded with B successively twice. CONSTITUTION:The V grooves 4 (about 1mu deep) are formed by etching anisotropically, for example, a (100) face P type Si substrate 1 to obtain an oxide film 5 (about 4,000Angstrom ) on its top surface. Next, a polycrystalline Si layer 6 (about 2,000 Angstrom ) is deposited, and B ions are implanted into the polycrystalline layer at the grooves 4 with an energy strong enough for the ions to penetrate through the polycrystalline Si layer in the flat parts. After a heat treatment, a selective etching is carried out with a KOH solution to leave a B-added polycrystalline layer 7 in each groove 4. Then, a polycrystalline Si layer 8 of volume and thickness enough to fill the groove part is provided. This is heat-treated to diffuse the B-added region, and selective etching is performed again to leave a polycrystalline layer 9 in each groove where B has been diffused to obtain a separating region between elemtnts. Thus a plain and separated structure can be formed in the deposited polycrystalline Si layer without any mechanical grinding or the like, and a larger-scale integration of ICs and high yield can be obtained.
申请公布号 JPS619736(B2) 申请公布日期 1986.03.25
申请号 JP19800103341 申请日期 1980.07.28
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SHINOZAKI SATOSHI
分类号 H01L21/265;H01L21/306;H01L21/76 主分类号 H01L21/265
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