Flip-flop having improved synchronous reset

摘要

A flip-flop is provided having a data gate circuit for receiving input data and generating therefrom first and second complementary internal data signals representative of the input data. A master circuit is coupled to the data gate circuit for receiving a clock pulse and for latching the internal data signals during a predetermined portion of the clock pulse. A slave circuit is coupled to the master circuit for storing the internal data signals. A reset circuit supplies a synchronous reset signal to the master circuit for resetting the first and second complementary internal data signals on the occurrence of the next clock pulse.