发明名称 |
Asynchronous memory refresh arbitration circuit |
摘要 |
An arbitration circuit for asynchronously arbitrating between refreshing memory and performing a non-refresh memory cycle in a memory system having memory cycle generating circuitry. Arbitration circuitry comprising logic circuitry, a clocked storage device and delay circuits which are coupled to memory cycle generating circuitry for performing an arbitration decision for a memory during an immediately preceding memory cycle. The arbitration circuitry time overlaps an arbitration operation with a memory cycle operation during a first memory cycle, thereby improving data rate for an adjacent second memory cycle.
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申请公布号 |
US4578782(A) |
申请公布日期 |
1986.03.25 |
申请号 |
US19830526736 |
申请日期 |
1983.08.26 |
申请人 |
MOTOROLA, INC. |
发明人 |
KRAFT, DOUGLAS R.;ELROD, HARRY F. |
分类号 |
G06F13/18;G11C11/406;(IPC1-7):G11C7/00;G06F9/46 |
主分类号 |
G06F13/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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