发明名称 SUPERCONDUCTIVE LOGICAL GATE
摘要 PURPOSE:To reduce the initial delay of a current injection type superconductive logical gate, by providing a nonlinear resistance element having a prescribed characteristic in the place of a resistance which terminates an input signal. CONSTITUTION:A nonlinear resistance element JSN working as an input signal terminating resistance is connected in parallel with an input detecting junction J2 and has a large resistance value at a low current level and a small resistance value at a high current level. At the state of a relatively low current level at which the junction J2 starts to switch, this logical gate operates in an area where the resistance value of the element JSN is higher. Since the parallel resistance of the junction J2 appears apparently larger, the initial delay to the J2 switch is reduced. Therefore, the initial delay of this gate can be reduced.
申请公布号 JPS6158319(A) 申请公布日期 1986.03.25
申请号 JP19840179426 申请日期 1984.08.30
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 TAKARAGAWA KOJI
分类号 H01L39/22;H03K19/195 主分类号 H01L39/22
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