| 摘要 |
PURPOSE:To enable the selection of the optimum process of forming chips in respective circuits and the free design of logical circuits by a method wherein a logical circuit and an input-output circuit are formed in separate chips, respectively. CONSTITUTION:The upper chip 1 is provided with a logical circuit region 2, and the number of basic cell arrays 3 to be arranged in accordance with gate scales is changed, thereby determining the chip size. Terminals 8 are kept led out in position via wiring 7 in order to connect the lower chip 11. The lower chip 11 is provided with an input-output circuit (I/O buffer) region 12, wirings 13 to this circuit, terminals 14 for connection to the upper chip 1, and external connection terminals 6. This chip also gets I/O cells wired through arrangement by a computer. The upper chip 1 provided with a logic circuit is mounted on the lower chip 11 provided with an input-output circuit in a face-up manner, and corresponding terminals 8 and 14 upper and lower are connected to each other. After connection, the chip is covered with a protection film 15; thereafter, an LSI is completed through normal assembly processes and the like. |
