发明名称 SENSE AMPLIFIER CIRCUIT
摘要 A sense amplifier circuit used in, for example, a MIS static RAM includes a differential amplifier (Q11 through Q14) for sensing and amplifying the difference in potential between two input lines (DB and &upbar& D) and generating two bipolar differential signals (D and &upbar& D) and a pull-down circuit (Q15) for establishing a reference potential (VREF) for the differential amplifier. A compensation circuit (Q16, Q17 and Q18) is provided for detecting the in-phase component of the input lines so as to control the pull-down circuit. Therefore, the fluctuation of the reference potential follows the fluctuation of the in-phase component of the input lines so that a stable and high-speed sensing operation is effected.
申请公布号 DE3173729(D1) 申请公布日期 1986.03.20
申请号 DE19813173729 申请日期 1981.10.15
申请人 FUJITSU LIMITED 发明人 ORITANI, ATSUSHI
分类号 G11C11/41;G11C11/419;(IPC1-7):G11C11/40 主分类号 G11C11/41
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