Distributed multiprocessing system.

摘要

An architecture for interconnecting a plurality of remote processors (22-30) to a primary processor (10) is disclosed. The architecture provides an improved interface and a communication channel for interconnecting the processors. The interface includes a commonly shared buffer (20) which stores messages to be exchanged between the primary processor and the remote processors. A controller (32) (microprocessor based) is provided to manage the buffer and the communication channel. The controller (32) gives the primary processor direct access to the buffer periodically. Likewise, the controller uses a polling technique to enable each remote processor to communicate, over the communication channel, with the shared buffer.