Solid state power controller with overload protection.

摘要

A power controller with overload protection having an alternating current source (AC) connected through power lines (Ll, L2) and a pair of power switching devices (SW1, SW2) and a current sensor resistance shunt (SH) in series to a load (LD). A line-derived control power supply circuit (LDS) is connected through one of the power switching devices (SW1) to the power line (L1, L2) such that the control power supply current does not flow through the shunt (SH) or the load (LD). Close and open commands are applied from a control switch (CSW) through a threshold detector (DT) and a logic circuit (LG1) to operate a latch (LCH) that turns the power switching devices (SW1, SW2) on and off under the clocking control of a zero voltage detector (ZVD) and a zero current detector (ZCD) and the gating control of a minimum current circuit (MCC). An overload circuit (AVC, ITC, TTC, LG2) provides instantaneous trip of the latch on rupture current or timed trip of the latch on smaller overloads. Opto-isolated indicators (SS, ST) indicate trip conditions and loss of line voltage conditions as well as whether the load current is above or below a minimum current value which is a current level adequate for operation of the control system.