| 摘要 |
PURPOSE:To increase the degree of integration by interposing a feedback resistance of high-resistance polysilicon between the output of the 3rd circuit element and the input of the 2nd circuit element, and writing a signal in a latch circuit by the 1st circuit element without spoiling delay characteristics. CONSTITUTION:The feedback resistance 7 uses polysilicon having about 10<5>- 10<7>OMEGA high resistance, so it is realized without requiring a large area on an IC and an about 10MOMEGA value is easily obtained. Therefore, the input resistance of the latch circuit composed of inverters 5 and 6, i.e. equivalent on resistance of the inverter 6 is about 10MOMEGA and sufficiently large. On the other hand, the equivalent on resistance when a clock signl is at H and an inverter 4 is turned on is about 1-10KOMEGA. Therefore, the ratio of resistance values of the both is about 10<6> times, so new data are written in the latch circuit without spoiling delay characteristics. |
